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Two-step gate-recess process combining selective wet-etching and digital wet-etching for InAlAs/InGaAs InP-based HEMTs https://journal.hep.com.cn/fitee/EN/10.1631/FITEE.1601121
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Two-step gate-recess process combining selective wet-etching and digital wet-etching for InAlAs/InGaAs InP-based HEMTs https://journal.hep.com.cn/fitee/EN/10.1631/FITEE.1601121
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